Digitally implemented receiver architectures for low power radio

This paper describes an investigation into the implementation of digital channel filtering in low power radio receivers, which are used in systems such as Bluetooth and ZigBee. It outlines the possibility of implementing low power radio receivers using recently disclosed sigma-delta analog-to-digital converter (ADC) technology. The paper starts by describing common architectures used for low power radio receivers. The requirements and characteristics of an ADC to be used in the digitally implemented system are described. A comparative analysis of the power consumption of the digitally implemented receiver architecture is then presented. The paper concludes by examining the implications of anticipated technology trends for radio receiver architectures.