A code-less BIST processor for embedded test and in-system configuration of boards and systems

A code-less processor that enables designers to achieve optimal in-system FPGA configuration as well as embed built-in self-test capabilities into boards and systems is presented. This system BIST architecture enables designers to lower system costs and design effort while satisfying test and field engineering requirements for simplified product test. The BIST processor described here provides a structured approach to solve these problems, using infrastructure IP designed for the board and system levels.