A new mesochronous clocking scheme for synchronization in SoC

Future System-on-Chips (SoCs) need a new strategy for synchronization and clocking. In large-scale and high-speed systems, the traditional globally synchronous approach is not longer viable, due to severe wire delays. Instead new solutions as "Globally Asynchronous, Locally Synchronous" (GALS) approaches have been proposed. We propose to replace the GALS approach with a mesochronous clocking principle. In this paper we present such an approach together with a circuit solution in 0.18 /spl mu/m CMOS process that allows clocking frequencies up to 5 GHz.