Performance evaluations of stacked CSP memory modules

Two market trends that have been evident for some time are increasing microprocessor speeds and the increasing demand for additional functionality in electronic systems. These market trends in turn are driving the need for increased memory density and higher performance memory in systems such as personal computers, laptop computers and servers. To address these requirements, memory module manufacturers are looking to technologies capable of meeting these dual demands and at the same time keep overall costs trending down. New generations of dynamic random access memory (DRAM) such as double data rate (DDR) and next generation DDR2 technologies are contributing significantly toward increased system performance. Several options, including Tessera's stacked chip scale packaging (CSP), have been developed to address these high-density memory and performance requirements. Several critical issues surround this effort to increase the density and performance of electronic products. Form factor, electrical performance, thermal performance, reliability, cost and manufacturability. Future potential for higher density package technology will be outlined as it relates to trends in high density and high performance market needs. The following will examine the company's /spl mu/Z/spl trade/-Ball Stack package configurations.