An efficient implementation of the 1D DCT using FPGA technology

This paper describes and represents different algorithms and efficient implementation of one-dimensional 8 point discrete cosine transform on field programmable gate arrays. One of the main objectives is to minimize the complexity of operations as much as possible while maintaining low delays and high-speed throughput. Distributed arithmetic is a powerful technique that has been used for fast and efficient implementation of 1D DCT on FPGA.