High level synthesis methodology from C to FPGA used for a network protocol communication

This paper presents a "Kahn process network" methodology based on the DISYDENT platform (digital system design environment). The system is described by a set of communicating Kahn processes. This processes are C POSIX threads representing both software and hardware tasks. Each thread communicates with the others using channel-read / channel-write primitives. Thus, the system can be validated efficiently and quickly by software. System 's realization consists of synthesizing hardware tasks to RTL-VHDL language. This step is automated from C task to FPGA mapping. This paper shows the method's effectiveness through the realization of a network controller on FPGA enabling communication between two Linux stations.