A dynamically-reconfigurable image recognition processor

Summary form only given. We introduce a new image recognition processor using a run-time reconfiguration (RTR) technology. A phase impulse response function (PIRF) is employed as an application for evaluating the performance of RTR architecture. By utilizing the RTR architecture effectively, a complicated image processing application such as PIRF can be implemented on a single processor. To achieve this, a dynamically-reconfigurable arithmetic logic unit (DRALU) is proposed. Simulation results show that our proposed processor using DRALU can execute the PIRF within 30 msec.