Functional programming for reconfigurable computing

Summary form only given. Reconfigurable computing requires organizing computation with mixtures of processors and discrete logic thus presenting a difficult problem of hardware/software integration. An execution model and adaptation of functional programming is proposed which removes the distinction between hardware and software while offering the possibility of "correct by construction" design. The resulting language is called "V" because one way of creating it is to begin with the verifiable, synthesizable subset of Verilog, and then add functional programming features. V generates the net-list of elementary functions which are supported by an array. The compiler has stages of compilation and instantiation so that recursion can be supported in the early definition of a design. The execution model is cycle based synchronous dataflow. V syntax looks much like Verilog or C without pointers in order to facilitate adoption.