A high performance SIMD framework for design rule checking on Sony's PlayStation 2 Emotion Engine platform [IC layout]

We describe the design and implementation of a high performance floating-point single instruction multiple data (SIMD), edge based DRC engine supporting all-angle geometry and standard rule-decks, which has been implemented on Sony's PlayStation 2 Emotion Engine (EE) platform. We convert DRC constructs to SIMD compliant instruction streams for the vector processing units (VPUs) in the EE. We have achieved computational performance of the order of 10e/sup 6/ edge operations per second in layout analysis operations.