Design of SONOS memory transistor for terabit scale EEPROM

The approach for design of terabit scale silicon-oxide-nitride-oxide-silicon (SONOS) nonvolatile FLASH memory, based on high-k dielectric is proposed. The comparison of simulated write/erase characteristics of SONOS with different oxides SiO/sub 2/, Al/sub 2/O/sub 2/ and ZrO/sub 2/ as a top dielectric was made. For the first time we demonstrate, that an application of high-k dielectrics allows to decrease the write/erase programming voltage amplitude or programming time from 1 ms to 10 /spl mu/sec. The ZrO/sub 2/ suppresses parasitic electron injection from polysilicon gate. Also the design of SONOS memory based on high-k dielectrics is promising for terabit scale using hot carriers injection EEPROM and DRAM memory.