Comparing the bitstreams of applications specified in Hardware Join Java and HandelC

In this paper, we investigate the FPGA bitstreams of applications that have been specified in HandelC and Hardware Join Java. We focus mainly on the FPGA area used. To achieve this we specify an application consisting of a mixture of additions and multiplication operations and synthesise them. The resulting Netlists are place and routed using Xilinx Foundation Tools to determine the number of slices used by both solutions.