A general purpose high speed equalizer

The circuit presented is a high-speed self-adaptive filter achieving equalization over a wide range of signals, with a frequency of up to 40.5 MHz, such as the European D2-MAC and HD-MAC transmission standards. This 105000-transistor chip has been designed in a CMOS 1.0- mu m technology and is being used in a D2-MAC reception environment. In addition to the cabled D2MAC environment, this circuit can be implemented in such applications such as HDTV (HDMAC via satellite transmission). Its frequency (up to 40.5 MHz) and its flexibility due to programmable parameters allow this chip to be integrated in a wide range of systems.<
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