IRIS: a 20 MHz Image Recognition Integrated System

A high-performance image-processing chip with an architecture optimized for pattern recognition is described. This is the first VLSI device which integrates a complete pattern recognition system on a single chip including line delay circuitry. The full custom 1.5 mu m CMOS circuit contains 250000 transistors and operates at an image sampling rate of 20 MHz. The chip die size is 12.7 mm*11.5 mm and is packaged in a 144 pin ceramic PGA. The maximum clock speed is 20 MHz, and the chip dissipates a maximum of 1.5 W.<
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