A first-order current-steering sigma-delta modulator

A novel architecture for a first-order sigma-delta modulator is presented. The system can operate at a high sampling frequency, can be used as a building block for higher-order modulators, and uses circuit techniques that are largely technology-independent. The system was realized in a 2- mu m n-well double-metal single-poly CMOS technology. The integrated modulator circuit works accurately with a maximum sampling frequency of 30 MHz. A sampling frequency of 18.5 MHz gives the best results in terms of signal-to-noise ratio (SNR). The oversampling ratio is 128. The Nyquist frequency is 144 kHz and the baseband limit is 72 kHz. The corresponding theoretical SNR is 63 dB, or equivalent to a resolution of 10.5 b.<
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