A self-binning BIST structure for data communications transceivers

Data communication chips are becoming ubiquitous, and their operating frequencies are constantly increasing. Testing of these devices using customary methods has become increasingly challenging and difficult. An on-chip built-in self-testing (BIST) approach that overcomes such difficulties is proposed in this paper to test the functionality of transceivers on a data communications chip. The proposed BIST is capable of performing functional testing at different speeds, thus facilitating binning of the devices according to their working speeds. The concept has been applied to test a 400 Mbps three-port IEEE 1394a system, implemented in a 0.35 /spl mu/m CMOS technology.