Thermal transient modeling and experimental validation in the European project PROFIT

Results of the European project PROFIT on thermal transient measurement and modeling of IC packages are presented. All together 16 different packages from the three semiconductor manufacturers Infineon, Philips and ST Microelectronics were measured in four dual cold plate (DCP) environments as defined in the preceding DELPHI and SEED projects. Solutions to measure TO-type and fine pitch packages in the DCP, especially for the critical DCP-4 boundary condition were demonstrated, as well as reduction of interface resistance and increased reproducibility by using Wood's alloy as an interface material. The measurements were simulated using the commercial software packages ANSYS/spl reg/, FLOTHERM/spl reg/ or MARC/spl reg/. The agreement between simulated and measured thermal impedance is quite good (<15%) from steady state (t=1000s) to transients with t<0.1s, i.e. 4 orders of magnitude. In a few cases, this level of accuracy was kept even over 7 orders of magnitude. Increasing relative inaccuracy with shorter transients corresponds to small absolute errors in temperature. So for practical pulse temperature prediction, the accuracy should already be sufficient, for extraction of geometrical and material parameters, it is probably not.