A cellular-automaton-type image extraction algorithm and its implementation using an FPGA

This paper proposes a new region extraction algorithm based on cellular automaton operation, which utilizes only the region boundary information of the image. A simple pixel circuit for pixel-parallel operation is also proposed. Logic simulation results obtained using Verilog-HDL indicate that the proposed algorithm is about 100 times faster than the serial labeling processing for 100/spl times/100-pixel images. An experimental result for a 30/spl times/30-pixel image using an FPGA chip demonstrates that all regions are successfully extracted one-by-one within 6 /spl mu/s with a clock frequency of 25 MHz.