Saturated inverted transistor modeling for small-signal applications

The modeling and utilization of an inverted integrated n-p-n transistor as a controllable small-signal resistance is explored. A theoretical relation for inverse transistor saturation resistance is developed using a modified Gummel-Poon (G-P) model, and the results are compared to experimental measurements. The relation of inverse beta to the inverse saturation resistance is derived and modeled, as well as the effect of base charge, and bulk resistance. The factors governing the matching of saturation resistance between devices on the same chip and from lot-to-lot are investigated and compared to matching measurements. A noise model for the saturated inverted device is developed and noise measurements appear to confirm the model's validity. Finally, the application of this device to a programmable attenuator circuit is discussed and attenuation and harmonic distortion data are presented.