Circuit implications of the metal-gate polysilicon source-and-drain MOST process

The use of polysilicon layers as a diffusion source opens the way to a number of device innovations. One of these is the metal-gate `polysilicon source-and-drain' (PSD) MOST. Its main feature is a shrinkage in device size caused by the `automatic' (i.e., without any explicit contact window) connection between diffused regions and a polysilicon interconnection level. The advantages of this new process are elucidated in a comparison between PSD-MOST circuits and the standard `polysilicon self-aligned gate' (PSAG)-MOST circuits. Technological details have a mixed effect on device-circuit characteristics. By structuring the comparison into a device, a cell, and a circuit level, specific effects can be isolated and subsequently pointed out. It is shown, that PSD circuits potentially lead to a 33 percent higher packing density at a 25 percent higher switching speed, compared to standard PSAG circuits. Reliability has also been improved as the active area consumption is reduced by 50 percent together with a 75 percent decrease in the number of contact windows.