A 4096-bit high-speed emitter-coupled-logic (ECL) compatible random-access memory

A 4096-bit pseudostatic MOS random-access memory with emitter-coupled (ECL) compatibility on all inputs including clocks is described. This device exhibits access times of under 80 ns and cycle times of under 150 ns with a standby dissipation of 300 mW. The fully decoded memory is fabricated on a 204/spl times/237 mil silicon chip and is assembled in a 22-lead ceramic dual-in-line package.