Characterization of a 28 nm CMOS Technology for Analog Applications in High Energy Physics

In the past few years, the 28 nm CMOS technology has raised interest in the high energy physics community for the design and implementation of readout integrated circuits for high-granularity position-sensitive detectors. This work is focused on the characterization of the 28 nm CMOS node with a particular focus on analog performance. Small-signal characteristics and behavior of the white and
$1/f$
noise components are studied as a function of device polarity, dimensions, and bias conditions to provide guidelines for minimum noise design of front-end electronics. Comparison with data extracted from previous CMOS generations is also presented to assess the performance of the technology node under evaluation.