Configurable multi-layer CNN-UM emulator on FPGA using distributed arithmetic

A new emulated digital multi-layer CNN-UM (cellular neural network universal machine) chip architecture called Falcon has been developed. Simulation runtimes can be a hundred times shorter using the Falcon processor array compared to the software simulation. This huge computing power makes real time image processing possible. In this paper, the main steps of the FPGA implementation and optimization are introduced. A distributed arithmetic technique is used to optimize the architecture on FPGAs. Using this technique, smaller and faster arithmetic units can be designed than the conventional approach where multiplier cores and adder trees are used to compute the state equation of the CNN array.