High-speed mixed signal and RF circuit design with compact waffle MOSFET

A compact waffle MOSFET layout scheme is used to fabricate high-speed mixed-signal circuits and RF circuits. Due to the compactness of the waffle MOSFET, it saves more than 30% of chip area. The extracted parameters indicate a 20-40% reduction in source/drain diffusion capacitance and gate resistance. This reduction results in more than 10% improvement in the propagation delay of buffer circuits and an increase in the unity-gain frequency and phase margin of a high-speed two-stage operational amplifier. An active inductor designed with compact waffle MOSFET also gets higher Q value.