Extraction of parallel hardware during C to VHDL translation

Translating C/C++ language into VHDL is an important step in synthesizing hardware from C/C++. However, there is no explicit facility in the general C/C++ language to declare concurrent parallel execution which is a critical characteristic of hardware systems. This paper presents the outline of a set of transformation algorithms. These algorithms are helpful in the process of extracting parallel hardware during C to VHDL translation. An example of extracting parallel hardware from an array addition routine written in C is also presented in this paper.