Transforming bit-serial communication circuits into fast parallel VLSI implementations

Bit-serial circuits are traditionally used to encode, decode, and perform error checking in digital communication and mass storage systems. The throughput of these circuits can form a bottleneck in system performance. Expensive technology may be required to match the speed of the rest of the system. Techniques for transforming these circuits into bit-parallel implementations which achieve high throughput are presented. Circuits designed for a 50-Mb/s local area network controller are used as examples. Coding, decoding, and cyclical redundancy check circuits are fabricated in 4- mu m CMOS, yet achieve 50-Mb/s bandwidth.<
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