A novel current-mode design scheme for multi-valued logic gates

In this paper, a novel multi-valued logic gate set is designed as current-mode CMOS circuits. The gate set consists of min, max, inverter, and literal operators based on a versatile current-mode threshold topology. They are shown to exhibit superior static and dynamic behavior and consume less area compared to their binary-logic counterparts. The advantages of current-mode multivalued logic design are demonstrated with favorable circuitries, such as a radix-8 multiplexer.