Upset of a flip-flop based counting circuit by EM transients

The results of the upset of a ripple counter, constructed from D-type flip-flops, by transient pulses are presented in this paper. The results have shown that coupling of a transient pulse to one of the traces that connects the Q output of one stage to the clock input of the next stage of the counter can cause upset of the counter. In order for any stage of the counter to be upset, however, certain conditions must exist. Specifically, the clock input must be low, the D-input must be high and the transient pulse must have positive polarity. If these conditions do not exist then upset does not occur. The nature of the upset process has been confirmed by studying the effect of input state and transient pulse polarity on the upset of a single D-type flip-flop.