A delay model for router microarchitectures | IEEE Journals & Magazine | IEEE Xplore

A delay model for router microarchitectures


Abstract:

This article introduces a router delay model that takes into account the pipelined nature of contemporary routers and proposes pipelines matched to the specific flow cont...Show More

Abstract:

This article introduces a router delay model that takes into account the pipelined nature of contemporary routers and proposes pipelines matched to the specific flow control method employed. Given the type of flow control and router parameters, the model returns router latency in technology-independent units and the number of pipeline stages as a function of cycle time. We apply this model to derive realistic pipelines for wormhole and virtual-channel routers and compare their performance. Contrary to the conclusions of previous models, our results show that the latency of a virtual channel router doesn't increase as we scale the number of virtual channels up to 8 per physical channel. Our simulation results also show that a virtual-channel router gains throughput of up to 40 % over a wormhole router.
Published in: IEEE Micro ( Volume: 21, Issue: 1, Jan.-Feb. 2001)
Page(s): 26 - 34
Date of Publication: 28 February 2001

ISSN Information:


Contact IEEE to Subscribe

References

References is not available for this document.