Highly linear CMOS power amplifier for mm-wave applications

Fully-integrated highly linear Ka-band differential power amplifiers (PA) are designed in 28-nm CMOS process. A Class-AB topology is used to increase the efficiency and linearity. For proper operation of the class-AB amplifier, harmonic control circuits are introduced to minimize the 2
^nd
harmonics at the drain and source of the transistor. By adopting this structure, the common source / 2-stack PAs achieve PAE of 27% / 25%, and EVM of 5.17% / 4.2% and ACLR
_E-UTRA
of -33 dBc / -33 dBc, respectively, at an average output power of 9.5 dBm / 14.2 dBm at 28.5 GHz for a 20-MHz bandwidth, 64QAM, and 7.5-dB PAPR LTE signal.