Efficient static power based side channel analysis for Hardware Trojan detection using controllable sleep transistors

Modern integrated circuits (ICs) are vulnerable to Hardware Trojans (HTs) due to the globalization of semiconductor design and fabrication process. HT is an extra circuitry which alters functionality or leaks information making military and financial sectors vulnerable to security threats. The challenge in detection of HTs lies in their clever design and placement that makes them stealthy due to rare activation. While HTs can be detected through power side channels, methodologies that rely on dynamic power, which requires activation of HTs, can prove inefficient. On the other hand, static power based methodologies, which do not require activation of HTs, will be efficient even though they suffer from lower detection sensitivity. In this work, we propose a static power based HT detection methodology where the detection sensitivity is improved by compartmentalizing the circuit, utilizing the sleep transistors used to reduce leakage power. In order to provide efficient HT detection, the power based control is overridden in such a way that only a single sleep transistor is turned ON at any given instance. Even if the Trojan is distributed across the circuit to make it stealthier, the proposed method can effectively detect it. Using the proposed method, detection sensitivity of a 3-bit comparator based HT (0.26% of the total number of gates) has increased from 0.7% to 4.43% without process variations and from 2.03% to 4.32% in the presence of process variations with just 3 controllable sleep transistors The proposed method improved the detection sensitivity of smaller Trojan (only 0.02% of the total number of gates) by 10 folds with just 15 controllable sleep transistors.