Characterization of 64kb test chip for touch application on 90nm SONOS technology

In this paper, an embedded 2T SONOS nonvolatile memory structure has been proposed for an embedded NVM cell in 90nm standard HVCMOS process. This nonvolatile cell can be fabricated by several steps such as ONO formation, cell junction implant, removal ONO films, those steps are non-critical processes and masks. The cell is operated by CHEI programming and BTBT-HHI erasing. The cell has been confirmed with 64kB test chip, program and erase operation, cycling, data retention. With wide window and good reliability, the cell is good for medium density embedded memory.