A 1.7mW 0.22mm2 2.4GHz ZigBee RX exploiting a current-reuse blixer + hybrid filter topology in 65nm CMOS

Nanoscale CMOS offers sufficiently high f
_t
and low V
_t
favoring the design of ultra-low-power wireless receivers (RX) via stacking the RF-to-BB functions in one cell, while sharing the smallest possible bias current. Also, the signals can be conveyed in the current domain to enhance the area efficiency (i.e., no AC-coupling capacitor), RF bandwidth and linearity at those inner nodes. The 2.4GHz LMV cell [1] for ZigBee RX is an example that unifies one LNA, two mixers (I/Q) and one VCO. The power is low (2.4mW), but the NF, gain and S
₁₁
are sensitive to its external high-Q inductor that performs narrowband input match and passive gain boost. Although one VCO (i.e., one inductor) can save area and power, the I/Q generator has to be placed in the RF path. Realized as a g
_m
-C network, it suffers from a 3dB gain loss deteriorating the RX NF (12dB), while rendering the I/Q accuracy more susceptible to process variation.