A 9.4-/spl mu/m/sup 2/ 38-GHz sidewall polycide base bipolar (SPOTEC) with half-micron CMOS technology for very-high-speed ULSIs

The BiCMOS technology described combines very small high-speed Si bipolar transistors and half-micron CMOS FETs. The bipolar transistors are fabricated with self-aligned sidewall polycide base technology (SPOTEC), which makes it possible to reduce their area below that of CMOS FETs. Their footprint can be as small as 9.4 /spl mu/m/sup 2/. Shallow junction technologies improve bipolar performance, and a maximum cut-off frequency of 38 GHz is achieved with good bipolar and CMOS I-V characteristics. The driving ability of these BiCMOS circuits is twice as that of CMOS circuits.