ToPiX: A CMOS 0.13 µm silicon pixel readout ASIC for the PANDA experiment

The ToPiX ASIC is a custom development for the electronic readout of the silicon pixel detector for the PANDA experiment. The ASIC has to cope with a particle rate of up to 6.1 × 10
⁶
particles/s and with the absence of a trigger signal, thus dramatically increasing the amount of data to be transmitted. A reduced scale prototype with four 128 cells, four 32 cells columns, end of column logic and serial output has been designed in a CMOS 0.13 μm technology and tested. The ASIC measures both the hit arrival time and the charge released via a Time over Threshold technique.