Compensation of externally applied mechanical stress by stacking of ultra-thin chips

A novel method in minimizing mechanical bending stress on CMOS devices in ultra-thin chips is presented. It is shown, that the stress due to thin chip bending is reduced by glue-attaching a bare silicon chip on top of the active chip, thus shifting the neutral line to the active layer. The effect of the top chip thickness is investigated experimentally, determining the optimum thickness value for stress compensation. Apart from this, an analytical model is used to calculate the stress in the active area of the CMOS devices in case of a stacked flexible system. This model is confirmed by experimental results. It is verified, that the viscoelastic behavior of the glue layer has little impact. Nevertheless, the homogeneity and the quality of the layer affect the stress compensation considerably.