A dual symbol arithmetic coder architecture with reduced memory for JPEG2000

A dual-symbol arithmetic coder architecture with reduced memory is presented for JPEG2000. Eight process elements are used for the prediction of probability interval A. And the use of a dedicated Probability Estimation Table decreases the internal memory greatly. Upon FPGA synthesis results, the architecture's throughput can reach 96.60M context symbols per second with an internal memory size of 1509 bits.