Design Aspects of HighOrder DeltaSigma A/D Converters

This part contains sections titled:

• Introduction

• Motivation for using high-order single-bit loops

• Design choices: SC or active-RC?

• Stability

• Transient input signals and stability; the case for mild pre-filtering

• Choices for the NTF

• Comparison of loop topologies

• Loop filter design example

• Non-linear global stabilization techniques

• Practical measures for preventing idle tones

• Practical implementation of a stereo delta-sigma 18-bit ADC IC

• Noise-shaping modulator IC

• Switched-capacitor loop filter design

• Circuit noise considerations

• Stabilization using integrator reset

• Op-amp design

• Results and comments

This part contains sections titled:

• Acknowledgements

• References