Dedicated and Programmable Digital Signal Processors

This chapter contains sections titled:

• A Low-Power Chipset for a Portable Multimedia I/O Terminal

• A Portable Real-Time Video Decoder for Wireless Communication

• Low Power Design of Memory Intensive Functions

• A 16b Low-Power Digital Signal Processor

• A 1.8V 36mW DSP for the Half-Rate Speech CODEC

• Design of a 1-V Programmable DSP for Wireless Communication

• Stage-Skip Pipeline: A Low Power Processor Architecture Using a Decoded Instruction Buffer