Memory Design for Testability and Fault Tolerance

This chapter contains sections titled:

• General Design for Testability Techniques

• RAM Built-In Self-Test (BIST)

• Embedded Memory DFT and BIST Techniques

• Advanced BIST and Built-In Self-Repair Architectures

• DFT and BIST for ROMs

• Memory Error-Detection and Correction Techniques

• Memory Fault-Tolerance Designs

This chapter contains sections titled:

• References