A BiCMOS PLLBased Data Separator Circuit with High Stability and Accuracy

This article describes a data separator which can work in Winchester disk drives at a read/write speed of up to 30 Mb/s. To realize high stability and accuracy in reproducing data in high-speed transfers, not only a digital synchronization field detector is used, but also an analog dual-mode phase-locked loop (PLL) which has a new phase detector. The new phase detector has constant gain in the data field, independent of pattern. In addition to the above circuit, the IC incorporates a run-length-limited (RLL) 2-7 code encoder/decoder and a write compensator. By using the 2-µm BiCMOS process, the total power consumption is kept as low as 400 mW even at the high transfer rate of 30 Mb/s.