Abstract:
This paper develops a systematic method for the synthesis of electronic circuits which must realize symmetric Boolean functions. The ``fold-down'' method, originated by S...Show MoreMetadata
Abstract:
This paper develops a systematic method for the synthesis of electronic circuits which must realize symmetric Boolean functions. The ``fold-down'' method, originated by Shannon [1], solves the problem nicely for relay circuits. The electronic circuit, however, composed of ``and,'' ``or,'' and ``not'' elements, does not seem to incorporate the feature of symmetry as readily. It is shown that for symmetric functions a minimal-not condition exists, and that this form is a powerful tool for synthesis. The minimality is not actually proven, except for the case of fundamental symmetric functions. As with the minimal-or circuit, a minimal-not circuit does not necessarily imply the most economical realization, and the design procedure should take account of this fact.
Published in: IRE Transactions on Electronic Computers ( Volume: EC-7, Issue: 1, March 1958)