The study of mobility-tin, trade-off in deeply scaled high-k / metal gate devices and scaling design guideline for 22nm-node generation

The trade-off between T
_inv
scaling and carrier mobility (mu) degradation in deeply scaled HK/MG nMOSFETs has been investigated based on experimental results. I
_on
, components are analyzed in terms of N
_S
, v
_inj
and SCE in L
_g
= 25 nm devices for the first time. As a result, it is clarified that the aggressive T
_inv
scaling can achieve the performance improvement even if mu degradation occurs in some degree, because mu impact decreases with L
_g
and T
_inv
scaling impact becomes strong. Furthermore, we have introduced the effective T
_inv
scaling (novel SiON) process and demonstrated its excellent device performance (I
_on
1 mA/mum @I
_off
=100 nA/mum, L
_g
25 nm, V
_dd
=LOV, A
_vt
=1.8 mV mum, T
_inv
1.13 nm, without any performance booster technology).