Reconfigurable implementation for On-Board digital Processors

The possibility to adapt in-flight the behavior of a space-based equipment to different operating conditions and/or new functional requirements is of paramount importance in the field of the commercial telecommunications satellite systems. The in-flight adaptability is particularly significant for an on-board processor (OBP) based on the signal regeneration: such kind of equipments, though offering excellent performances, require the knowledge of the air interface to operate. The present paper describes a regenerative OBP architecture which makes use of the SRAM-based FPGA technology to obtain a fully reconfigurable platform, where any functional block of the signal processing chain may be completely modified in-flight. A prototype of the proposed OBP architecture and a procedure to perform an efficient and reliable payload reconfiguration is described.