A 3.8 Gs/s, 75mW, 10 bit continuous time bandpass ΣΔ ADC in 0.25 μm SiGe BiCMOS technology

The direct conversion of RF signals to digital bit stream is one of the main requirements of software radio architecture. This paper reports the design of a fourth order continuous time LC bandpass sigma-delta ADC which performs A/D conversion of narrowband signals around 950 MHz using 3.8 GHz clock. A new architecture is proposed which uses only non return to zero (NRZ) DAC with the LC loop filter to reduce the effects of clock jitter. The architecture also has full control of tuning all the loop transfer function coefficients in order to obtain good SNR performance. The operation of the architecture is examined in detail and extra design parameters are introduced to ensure robust operation of the ADC. Measurement results of the ADC, implemented in IBM 0.25 μm SiGe BiCMOS technology, show SNR of 63 dB and 59 dB in signal bandwidths of 200 kHz and 1 MHz, respectively, around 950 MHz while consuming 75 mW of power from ± 1.25 V supply.