A Parallel Accumulator for a General-Purpose Computer

A family of parallel synchronous comparitors and adders are described which can be constructed entirely of either NOR or NAND circuits. An adder is shown combined with registers to form a high speed but inexpensive 20-bit accumulator. The standard accumulator functions of ADD, UNITE, EXTRACT, LEFT SHIFT, and RIGHT SHIFT are obtained at the cost of 7.5 gates per bit and 12 gate delays for stable sum.