Predicting Signal Degeneration and Gate Compatibility in Logic Circuits | IEEE Journals & Magazine | IEEE Xplore

Predicting Signal Degeneration and Gate Compatibility in Logic Circuits


Abstract:

A simple graphical analysis of the output vs input curves of a digital circuit will show whether the circuit can be used in arbitrarily long logical chains. The analysis ...Show More

Abstract:

A simple graphical analysis of the output vs input curves of a digital circuit will show whether the circuit can be used in arbitrarily long logical chains. The analysis uses upper and lower bounds for the output vs input curves, but these bounds can be interpreted as statistical confidence limits. Results of the analysis give necessary and sufficient conditions for various different types of gates to be compatible.
Published in: IEEE Transactions on Electronic Computers ( Volume: EC-12, Issue: 3, June 1963)
Page(s): 277 - 281
Date of Publication: 26 December 2006
Print ISSN: 0367-7508

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