Hardware implementation of Montgomery's modular multiplication algorithm | IEEE Journals & Magazine | IEEE Xplore

Hardware implementation of Montgomery's modular multiplication algorithm


Abstract:

Hardware is described for implementing the fast modular multiplication algorithm developed by P.L. Montgomery (1985). Comparison with previous techniques shows that this ...Show More

Abstract:

Hardware is described for implementing the fast modular multiplication algorithm developed by P.L. Montgomery (1985). Comparison with previous techniques shows that this algorithm is up to twice as fast as the best currently available and is more suitable for alternative architectures. The gain in speed arises from the faster clock that results from simpler combinational logic.<>
Published in: IEEE Transactions on Computers ( Volume: 42, Issue: 6, June 1993)
Page(s): 693 - 699
Date of Publication: 30 June 1993

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