Lateral distribution of interface states in PMOSFETs

Precise measurements of the lateral distribution of interface states in PMOSFETs, before and after drain-avalanche-hot-carrier (DAHC) stress, are reported. The results are analyzed in the context of simultaneous gate current and substrate current measurements, and 2-D numerical simulations. Comparison of the results to similar NMOSFET measurements demonstrates that electron injection across the Si-SiO/sub 2/ interface during DAHC stress creates amphoteric interface states along the drain-region interface and negative trapped oxide charge along the channel-region interface.<
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