Abstract:
In the hardware implementations of the Advanced Encryption Standard (AES) algorithm, employing composite field arithmetic not only reduces the complexity but also enables...Show MoreMetadata
Abstract:
In the hardware implementations of the Advanced Encryption Standard (AES) algorithm, employing composite field arithmetic not only reduces the complexity but also enables deep subpipelining such that higher speed can be achieved. In addition, it is more efficient to employ composite field arithmetic only in the SubBytes transformation of the AES algorithm. Composite fields can be constructed by using different irreducible polynomials. Nevertheless, how the different constructions affect the complexity of the composite implementation of the SubBytes has not been analyzed in prior works. This brief presents 16 ways to construct the composite field GF(((22)2)2) for the AES algorithm. Analytical results are provided for the effects of the irreducible polynomial coefficients on the complexity of each involved subfield operation. In addition, for each construction, there exist eight isomorphic mappings that map the elements in GF(28) to those in composite fields. The complexities of these mappings vary. An efficient algorithm is proposed in this brief to find all isomorphic mappings. Based on the complexities of both the subfield operations and the isomorphic mappings, the optimum constructions of the composite field for the AES algorithm are selected to minimize gate count and critical path
Published in: IEEE Transactions on Circuits and Systems II: Express Briefs ( Volume: 53, Issue: 10, October 2006)