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Journals & Magazines >IEEE Transactions on Computers >Volume: C-21 Issue: 12

A Design Procedure for Fault-Locatable Switching Circuits

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S.M. Reddy
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Abstract:

A technique to design fault-locatable combinational switching circuits is given. The networks resulting from the application of the proposed technique have at most three ...Show More

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Abstract:

A technique to design fault-locatable combinational switching circuits is given. The networks resulting from the application of the proposed technique have at most three levels of gates.
Published in: IEEE Transactions on Computers ( Volume: C-21, Issue: 12, December 1972)
Page(s): 1421 - 1426
Date of Publication: 14 August 2006

ISSN Information:

DOI: 10.1109/T-C.1972.223517

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